Signed in as:
filler@godaddy.com
Signed in as:
filler@godaddy.com
Electrical & Computer Engineering
Dissertation: Resource-Optimized Scheduling for Enhanced Power Efficiency and Throughput on Chip Multi-Processor Platforms
GPA: 3.3/4.0
Electrical & Computer Engineering
Thesis: Contention-Aware & Power-Constrained Scheduling for Chip Multicore Processors
GPA: 3.6/4.0
Electrical & Computer Engineering
Senior Design Project: HoloLens + IoT (Internet of Things) Smart Room
GPA: 3.6/4.0
(September 2024 - Present)
As Technology Lead at OpenGrowth Ventures:
(January 2018 - May 2024)
Developed the following under academic advisor Dr. Iraklis Anagnostopoulos:
(August 2018 - May 2020)
As Teaching Assistant for Introduction to Computer Architecture (ECE329L):
(October 2015 - December 2017)
C • Python • Verilog • C++
MIPS & ARM Assembly • Bash • R • Git • CMake • GDB • MATLAB • LaTeX
Xilinx Vivado • Cadence Virtuoso • Cadence ADE L • Cadence Spectre AMS • Cadence Liberate • Synopsys VCS • Atalanta ATPG
PCB Design: KiCAD, Fritzing • Microcontrollers: RP2040, ESP32 • I2C, SPI, UART, GPIO • ADC/DAC • PWM • FreeRTOS
MPI • OpenMP • Intel RDT • Intel CAT/CMT • CUDA